NCAFM2023 Programme Booklet

Monday 1520-1540

SPATIALLY RESOLVED INTERFACIAL POLARIZATION TIMESCALES AT THE Si/SiO 2 SURFACE

Megan Cowie and Peter Grütter

1 Department of Physics, McGill University, Montrèal, Canada Email: megan.cowie@mail.mcgill.ca

When a time-varying electric field is applied to a semiconductor, charge reorganization at the semiconductor surface leads to dielectric dispersion. In fm-AFM experiments, charge reorganization occurs over every oscillation cycle due to changes in band bending as the tip-sample separation varies. This is a dispersive process, and consequently (for charge reorganization timescales much faster than the oscillation period) manifests as an increase in the fm-AFM drive/excitation amplitude. In this work, we measure surface charge organization timescales on the order of nanoseconds to tens of nanoseconds at the Si/SiO 2 surface using a 300 kHz cantilever in UHV at room temperature. The timescale of charge organization depends on the applied gate bias, and can be directly correlated to the characteristic surface charge distribution that occurs in each bias regime of a metal (tip) – insulator (vacuum) – semiconductor (sample) MIS capacitor. Isolated trap states at the surface additionally influence this charge reorganization timescale: At biases where there is significant interaction between the semiconductor surface charge density and the isolated trap state, the charge reorganization timescale increases. This leads to an increase in the fm-AFM drive/excitation amplitude, which peaks at a bias corresponding to the position of the trap state within the surface band gap as well as its spatial depth within the Si/SiO 2 interface. This bias-dependent spatially localized peak manifests as a ring when the surface is measured at constant tip-sample separation at large biases, as shown in Figure 1. These measurements are particularly significant for the advancement of semiconductor qubits, as the stability and robustness of buried qubits depends on the uniformity of the dielectric dispersion within the semiconducting electronic bath.

Fig. 1 Multipass fm-AFM drive/excitation measurements of trap states at the Si/SiO 2 surface at variable bias at room temperature. Two different trap states are shown: A-C (negative biases) and D-F (positive biases). These images indicate a bias-dependent spatially localized trap-induced increase in the dielectric dispersion (or charge reorganization timescale) at the surface. The lateral scale bar is 30 nm, and the vertical scale bar for A-F is 0:550 meV /cycle (0:~0.09 aJ/cycle).

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